As a wafer from which a discrete semiconductor, a bipolar IC, and so forth are produced, a semiconductor epitaxial wafer has been widely used because of its excellent characteristics. Moreover, for a MOS LSI, the semiconductor epitaxial wafer has also been widely used in a microprocessor unit and a flash memory device because of its excellent soft-error and latch-up characteristics.
Such a semiconductor epitaxial wafer is produced in the following manner, for example.
First, a single crystal ingot is produced generally by the Czochralski (CZ) method or the floating zone (FZ) method. The produced single crystal ingot is cut into blocks, and subjected to a rounding process (a cylindrical grinding process) to make its diameter uniform. The single crystal ingot block is sliced into a plurality of wafers (a slicing process), and a chamfering process (a beveling process) is performed on the wafer to remove the corner on its periphery. On the wafer, a mechanical grinding process (a lapping process) is then performed to remove its surface irregularities, improve its flatness, and minimize machining strain produced in the slicing process. Then, a machining strain layer formed in a surface layer of the wafer in the mechanical grinding process is removed, for example, by mixed acid etching (an etching process).
Next, a protective film for preventing automatic doping (a dopant volatilization preventive film) is formed at least on the back surface of the wafer. A mirror polishing process is then performed to polish the front surface of the semiconductor wafer into a mirror-polished surface by chemical and mechanical polishing (CMP), and on the mirror-polished surface, an epitaxial film is formed; through these processes, a semiconductor epitaxial wafer is produced.
Here, an additional explanation of automatic doping is provided. In an epitaxial process of growing a single crystal thin film (an epitaxial film) on a wafer by chemical-vapor deposition, the wafer is generally exposed to a high temperature of about 1000 to 1200° C. At this time, an automatic doping phenomenon occurs, a phenomenon in which dopant contained in the wafer is volatilized and taken into the epitaxial film during the process of forming the epitaxial film.
In particular, in production of a semiconductor epitaxial wafer for a power MOS, a low resistivity wafer whose conductivity type is P-type or N-type, heavily doped with impurities, has been used as a substrate for forming an epitaxial film; in this case, the occurrence of automatic doping becomes remarkable.
That is, when such a heavily-doped wafer is heated, an automatic doping phenomenon in which impurities such as boron, phosphorus, antimony, and arsenic with which the wafer is doped escape from the wafer and enter the epitaxial film occurs in a wafer without a dopant volatilization preventive film, which makes it impossible to obtain an epitaxial film having a desired resistivity. As a result, the electrical characteristics of the semiconductor epitaxial wafer change, and a semiconductor device fabricated by using this semiconductor epitaxial wafer does not exhibit characteristics as designed and becomes a failure.
Therefore, as described earlier, to prevent automatic doping, a dopant volatilization preventive film on the back surface of a wafer is needed. Since high flatness is particularly required in a large-diameter wafer such as a 300-mm-diameter wafer, after double-side polishing is performed to planarize the wafer, an oxide film as a dopant volatilization preventive film is formed on the back surface of the wafer by chemical-vapor deposition (CVD).
Then, in the above-described mirror polishing process, the front surface side of the silicon wafer, that is, the side on which an epitaxial film is to be grown by chemical-vapor deposition is mirror-polished by single-side polishing. In the single-side polishing, since strain is produced in the silicon surface in a process of forming an oxide film by CVD, the mirror-polished surface needs to be finished by polishing the silicon front surface side at least up to several micrometers to remove the strain.
However, there arises a problem that the wafer flatness is degraded by single-side polishing with a stock removal required to remove the strain produced in the oxide film formation process by CVD. In recent years, there is a necessity to improve the degraded flatness of the wafer to meet an increasing need for a wafer with higher flatness.
Here, Patent Document 1 discloses a method for producing a semiconductor wafer, enabling a highly flat wafer having a mirror-polished surface and a rough surface to be produced by polishing with a double-side polishing apparatus a wafer on which an oxide film is grown on one surface by CVD.